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• 
  @stephenwhite5062 күн бұрын

  Perhaps consider using a TPS2115A for your dual 5V power inputs. It will "power OR" your inputs and you will not need to manually set a jumper. Among its many benefits is that you can also use it to set a current limit.

• 
  @asmi062 күн бұрын

  I don't know what kind of heatsink you intend to use, but a lot of them require some clearance around the SoC, so please confirm that those components which are very close to the FPGA will not prevent installing heatsink, nor will it short anything by touching from the top.

• 
  @rehsd2 күн бұрын

  Thanks for the heads up. I've been looking at different heatsink and heatsink+fan setups, but I haven't identified any specific one that looks best yet. For the ones I have looked at, I think I should be OK. However, looking at my Done LED, I should probably move it out further so that it doesn't get covered up.

• 
  @asmi062 күн бұрын

  @@rehsd I recommend you to settle on some heatsink and actually buy a couple of them just to make sure you have them on hand, as there's very little standardization and each one tend to have unique footprint.

• 
  @rehsd2 күн бұрын

  @@asmi06 Do you happen to know if passive heatsinks (no fan) are adequate, or is a heatsink with fan a good idea? I'll have to do some research on heatsink sizing. I see AMD has document XAPP1377; I'll have to read through this.

• 
  @asmi06Күн бұрын

  @@rehsd I had a lot of troubles finding such a small heatsink + fan, that I had to settle for oversized one for my recent project - it uses 23x23 mm FPGA, but the heatsink is designed for 27x27 mm parts, and I jury-rigged a 25x25 mm fan on top of it. You will probably have to do something similar unless you fill have more luck with your search. And you definitely want to have a fan for xc7z020 as it can generate some serious heat when pushed.

• 
  @asmi062 күн бұрын

  You need to be very careful when doing fills on layers which contain controlled impedance traces, as when done wrong it can significantly affect impedance due to edge coupling. Unless you have tools to run SI simulation to confirm impedance, keep all fills well away from CI traces.

• 
  @rehsd2 күн бұрын

  Great point, thank you! As you say this, I remember Phil mentioned this in one of his videos. I will work on this.

• 
  @alifesh2 күн бұрын

  New sub here, and very interested in this project. I understand this is a work in progress so here are a couple of notes from personal experience: - Reconsider memory routing and positioning. Moving 8 layers down and back up will be very bad for DDR signal integrity especially since there are no ground vias along each trip down and back up, the return paths of those signals will go wild. Move the memory closer to the to the FPGA and rout all signals in group (addr/data) in the same layer (preferably top layer) without any layer traversing. If not possible, make sure at least there is 1 GND (pref. 2+) via(s) per each signal via at each end of layer change. - Seriously consider PCBA service for at least under 0402 components preferably for all components. Soldering sub0402 components is not reasonably practical without especial tools. - Move the linear power regs closer to their consumers. FPGAs and DDRMEMs are sensitive to power source noise that can be picked up by long power traces in a fast switching signal environment especially the ones below 3v3. - for first prod run, expose your extra pins as pads or pins rather than high density connectors, debugging lines in covered connectors is exceedingly difficult without a lot of extra stuff. If you must use high density connectors, provide plenty of the test pads for probes and such. Great job and looking forward to it's progress and realization.

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  @rehsd2 күн бұрын

  Thank you for all the suggestions! -I will experiment with moving the DDR closer to the FPGA. I wasn't seeing a good way to keep the signals on the same layer, but I can add GND vias as you suggested. -Fortunately, the only 0201 components I have are the small number of capacitors under the SoC. As I get closer to something orderable, I'll check out pricing from JLCPCB for assembly. One concern is that I don't need/want five assembled boards (or at least the associated cost). -For the regulators, I can for sure move 1V35 and 0V675 closer to the DDR. I'll review the others and see if I can reasonably move them closer without creating other routing challenges. -I'll put some thought into test pads; I don't have anything for this yet.

• 
  @alifesh2 күн бұрын

  @@rehsd I order from JLCPCB regularly when doing prototypes. You can have as few as 2 boards assembled. Thou I usually have them do the 5 for all the passive and common cheap parts (res, cap, reg, usb ...) and then do the main chips myself as cost control. The major PCBA cost aside from the expensive chips is the setup cost and that is pretty much fixed regardless volume. You'd save a lot of time and potential points of failure that way.

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  @rehsd2 күн бұрын

  @@alifesh Good to know. I have only ordered assembled PCBs once before, and I was thinking the minimum was five for some reason. It definitely would be nice to not have to worry about soldering issues!

• 
  @cryptocsguy92822 күн бұрын

  Link to the course you mentioned at the start please ? 😃

• 
  @rehsd2 күн бұрын

  fedevel.com/courses/advanced-digital-hardware-design

• 
  @ostrov115 күн бұрын

  ... hi, нow are you?

• 
  @RayR9 күн бұрын

  This is interesting. To me it's the perfect retro graphics project. 8Bpp chunky pixels would be just right for a retro game.

• 
  @YoutubeBorkedMyOldHandle_why10 күн бұрын

  I just came across this video. Fascinating. By some coincidence, I just built an FPGA board using exactly the same chip. The pcb had been sitting on my desk for probably 8 months (I've been busy), but I finally managed to get it working. It's not my design, (more in a bit), I just built it. Now, unlike you, I took a huge chance and just threw the entire board together ... then tested it. Probably not the best decision. There were issues, but thankfully I did manage to track the issues down, (just dumb mistakes), and thankfully nothing got fried in the process. My board was designed by John Winans (John's Basement on youtube.) He's a university prof, so he covers everything in painstaking methodical detail. Notably, on the choice of flash chip, he's using a AT45DB161D. These are relatively common and cheap, (although most suppliers seem to list them as obsolete, but have lots of AT45DB161E chips, which are presumably a newer version.) Anyway, as John explains, the reason he chose this chip is that it has a particular set of instructions which the tools use, is the same chip the ICE Stick uses, and is common for many FPGA dev boards. John is also a huge fan of Open Source tools, so he is using the IceStorm work flow (Yosys, Arachne-pnr, and IceStorm.) There are some huge advantages to using Open Source, so it's a good idea to be familiar, even if you mostly use the commercial software (something about a rumour that Lattice was moving to a paid version for their software?) As usual, John covers the installation of the IceStorm tools in methodical detail. ICEStudio, by the way, is essentially a 'front end' for these tools, so once you understand the tools better, perhaps ICEStudio will make more sense. Besides designing the board and explaining the tools, John also methodically explains how to write programs in Verilog, and has created a workflow which simplifies the whole process. Also WELL WORTH looking into, is the FPGA series that Shawn Hymel did (search youtube for 'shawn hymel fpga') Shawn uses the Lattice Ice Stick for these videos, along with the IceStorm open source tool chain. I just happened to own an Ice Stick, so that was nice, but you should have no problem following along with any Lattice fpga based board, including the one you built.

• 
  @shahidriaz656820 күн бұрын

  Great job may be I have a time to assemble this one. But I am looking for the basic ARM computer on same footprints. Any help regarding the ARM computer development.

• 
  @rehsd2 күн бұрын

  I've done 6502 and 65816 systems, but not ARM. Someday maybe.

• 
  @stephenwhite50628 күн бұрын

  If you take a look at the zybo-z7-d1-sch.pdf schematic it uses a TMDS141 for the HDMI input and a TS3DV642 for HDMI back power protected, buffered output. For the input it has pull ups post TMDS141 and for the output it has pull ups pre TS3DV642. Strangely, it has two sets of pull ups on the inputs (see page 6). Not sure if you know about it but another great resource is the free book; "A Practical Introduction to the Xilinx Zynq-7000 Adaptive SoC - Bare-Metal Fundamentals", written by Derek Murray.

• 
  @asmi06Ай бұрын

  Also during component placement remember that PCB has two sides, and not just one.

• 
  @asmi06Ай бұрын

  Your HDMI connectors are way too close - no way you'd be able to connect cables to both of them at the same time.

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  @rehsdАй бұрын

  In the next week or two, I will measure things out more thoroughly, and consider the bottom side of the PCB for placement of components. I imagine once I start looking at actual routing, I'll want to shift things around yet, too. Thanks!

• 
  @asmi06Ай бұрын

  HDMI *requires* pull-ups, and no, diodes are not pull-ups. The reason datasheet doesn't show them is that often HDMI ports of a SoC have them integrated internally. But since you use a general purpose IO pins (as opposed to dedicated ones, which is usually the case for SoC), they don't have integrated pull-ups, and therefore, you need to have external ones. Unless you use some kind of active component like retimer or signal conditioning IC - for example TDMS141, which is what I like to use - these often have internal termination resistors as well.

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  @rehsdАй бұрын

  Thank you for those details! I'll get pull-ups put back in.

• 
  @asmi06Ай бұрын

  When you place connectors close to each other, make sure you place them far enough apart so that you can actually connect cables to both of them at the same time, as often cable-side connectors are larger than connectors on PCB.

• 
  @pvc988Ай бұрын

  Good advice. Even big, known electronics companies often screw that up.

• 
  @asmi06Ай бұрын

  @pvc988 yep, I'm also guilty of that. Nowadays, I do a fit check to make sure this doesn't happen - by printing a top layer on a piece of paper, fitting connectors on it, and trying to connect external cables. It's not very hard, but it helped me more than once to avoid embarrassments.

• 
  @pvc988Ай бұрын

  I don't know what voltage levels your PG signals have but that 0.675 may not turn the MOSFET on at all. Anything below 4V is a little bit iffy for 2N7000.

• 
  @rehsdАй бұрын

  For the TPS56628DDAR, the PG is pulled up to VREG5, which is listed at 5.5V typical output. @asmi06 mentioned a TPS51200 for the DDR termination voltage; I'll look into it, as it has a PG which might be helpful here.

• 
  @asmi06Ай бұрын

  @@rehsd I use DMN2020LSN MOSFETs because they have a typical threshold voltage of just 1 V (1.5 V max), which makes them suitable for signals with logical levels of 1.5 V and above. And they are also super-cheap at about 18$ for 100 devices (18c each) - which will last your for a good while.

• 
  @rehsdАй бұрын

  Maybe I could use a BSH103? It appears to have a 0.4V threshold voltage. assets.nexperia.com/documents/data-sheet/BSH103.pdf

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  @asmi06Ай бұрын

  @rehsd That one should work too.

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  @pvc988Ай бұрын

  @@rehsd 0.4 V is super low, but it's minimum value (at 1 mA). Typical and maximum values are not specified. You would have to get some and check yourself.

• 
  @asmi06Ай бұрын

  I highly recommend you to switch to 0402 as a "default" size for passives - they are the cheapest size (0201 are usually more expensive than 0402), they take little PCB space and yet are still large enough to be handled manually with some practice perhaps. I only use sizes other than 0402 when there is a good reason to do it - typically it's capacitance and voltage for caps, or power dissipation for resistors.

• 
  @asmi06Ай бұрын

  If you want to have a "power good" signal for DDR3 termination, you can use a TPS51200 regulator - this is what I use in my designs which require termination.

• 
  @asmi06Ай бұрын

  You have a typo in schematics - at the Zynq symbol, you call positive clock as DDR_CK_P, but negative is DDR_CLK_N, while elsewhere it's called DDR_CK_N. Also remember that termination for clock line has to be beyond the last chip, so routing should be Zynq -> DDR3 chip 1 -> DDR3 chip 2 -> termination, chips shall be in the same order as other control signals in a flyby topology.

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  @rehsdАй бұрын

  You have a good eye for detail! I corrected that network label. Thanks!

• 
  @asmi06Ай бұрын

  @rehsd It's just a fresh set of eyes, which may have missed similar things in its own designs in the past...😉

• 
  @CoyoteSevenАй бұрын

  Hey look, it's a Commander X16 before the Commander X16 was a thing.

• 
  @TomStorey96Ай бұрын

  Robert Feranec/Fedevel had a video about what to connect shield to. The "simple answer" was "you connect it to the chassis" since it is an extension of the shield in the cable, which is not a signal ground. I forget what you're supposed to do when you don't have a chassis, but I'm sure the video will cover it The EEPROM for the FTDI chip will store the VID:PID pair, product name, serial, configuration, etc. You can program it with ftprog which is a free tool from FTDI. Given the EEPROM will be blank from the factory (unless you program it before soldering it to the board), the FTDI will come up with a VID:PID pair of ffff:ffff, but ftprog will be able to find it and then you can write some more sane values in to the EEPROM. 10 layers seems insane. You should be able to do it on 8. See Robert Feranecs video series about the Mt Olympus server motherboard which, fair to say, has many high speed interfaces, and is routed on 8 layers.

• 
  @asmi06Ай бұрын

  I recommend replacing full size SD card connector with microSD, which is much smaller, and most modern cards are actually sold as a microSD + full size adapter anyway.

• 
  @asmi06Ай бұрын

  For JTAG - As I understand, for Zynqs it's recommended to use Digilent HS3 programmer as it provides also a Zynq reset line which is used during debugging. This is the programmer I was using before Xilinx published a tool which allows programming FT chips on custom boards, it uses Xilinx standard 2x7 connector with 2 mm pitch (which is rather annoying).

• 
  @asmi06Ай бұрын

  If you want access to the widest possible capacity range for QSPI flash, you will have to go with BGA-24 package with 1 mm ball pitch - there are up to 2Gbit devices out there! This is the package of choice for me for that exact reason.

• 
  @asmi06Ай бұрын

  Your power indicators are not the best design. I would recommend to cue them off "power good" signals of respective DC-DC converter instead of power rail (as right now your indicators indicate presence of "some" voltage, not necessarily the right one), also replace BJT transistors with MOSFETs as you don't want to waste power by running big currents through the base junction (unlike BJTs, MOSFET do not conduct current through gate terminal as it's electrically isolated from other terminals).

• 
  @rehsdАй бұрын

  Great catch. Ya', that design wasn't great, and going off power good is much better. I will also swap out BJTs with MOSFETs. Thanks!!

• 
  @asmi06Ай бұрын

  DDR3 also requires termination for address and control signals (Address lines, BA0-BA2, CS, WE, RAS, CAS, CKE), and a 100 Ohm parallel termination resistor for clock line (connected between CKP and CKN, physically placed "after" all memory connections).

• 
  @monkev1199Ай бұрын

  The design in the video with two ram chips would probably need to be routed as fly-by and yes that would apply. Although I have also heard the termination is redundant if you have a point to point system (a single dram chip for example)

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  @asmi06Ай бұрын

  @@monkev1199 That is correct on both counts (though the latter with some caveats).

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  @monkev1199Ай бұрын

  For the latter I'm guessing it's based on length of traces?

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  @asmi06Ай бұрын

  @@monkev1199 That, and also a frequency (the higher the frequency, the shorter the traces have to be to be able to get away without termination). Ultimate judge here must be a simulation and/or experimentation.

• 
  @monkev1199Ай бұрын

  ​​@@asmi06thanks for the info. I guess I'll be conservative and add the termination resistors on my own design (ECP5 SOM with DDR3)

• 
  @asmi06Ай бұрын

  For FT2232 - it requires EEPROM (not flash), and it will be programmed over USB itself, so you don't need to worry about pre-programming anything before assembling. I typically connect USB shell to a system ground via 1M resistor and a high-voltage (200 V or higher) 1nF capacitor. The idea is to allow potentials on both sides to eventually equal, while limiting inrush current (hence high resistance), while shorting any high-frequency signals (to them the cap is going to look like a short).

• 
  @stephenwhite506Ай бұрын

  With HDMI it is best to insert something that will give you some ESD and back power drive protection eg TPD12S016. Without it your ZYNQ could be semi powered when plugged into a powered HDMI device when your board is turned off.

• 
  @rehsdАй бұрын

  Thank you, Stephen! I've added this to my backlog!

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  @marsupialpianist1450Ай бұрын

  Hello from the future

• 
  @heinzergrinder1901Ай бұрын

  Доброе утро... Будете ли показывать трассировку плата ? Спасибо

• 
  @rehsdАй бұрын

  Да, как только я сделаю маршрутизацию. Вероятно, это произойдет через месяц или два.

• 
  @asmi06Ай бұрын

  Unfortunately, because if the way MIO pinout works, you will need to use a level shifter for SD card. But I still highly recommend having it implemented because it will make working with Linux (if you ever get this far) MUCH easier.

• 
  @asmi06Ай бұрын

  Or, and also - Zynq 020 can get pretty hot, so you will want to have a provision on the PCB for the heatsink and perhaps even connector for the fan.

• 
  @rehsdАй бұрын

  Phil mentioned that in one of his videos, too. I have it in my backlog now.

• 
  @asmi06Ай бұрын

  You might want to study this whole USB stuff, as you don't seem to understand what's what in there. USB ULPI PHY is a physical interface for USB, typically on Zynq boards it's used for USB HOST - meaning Zynq is going to be the USB master, and you connect peripherals (keyboard, mouse, USB memory sticks, etc) to it. FT2232xx, on the other hand, is a USB device, meaning it's designed to be connected to some external host (like your PC). So you will need at least two separate USB ports, one of which is probably going to be a USB type A Receptable (so that you can connect external peripherals to it), which will be connected to USB ULPI PHY device. As for the second one, you can either connect to to USB type C port - in this case PC will be expected to provide power, or have dedicated USB Type C connector for power (so that you can connect a usb-c wall wart), and other connector to connect to PC - that one will be connected to FT2232xx.

• 
  @rehsdАй бұрын

  Yep, just haven’t gotten there yet. It’s on my list.

• 
  @asmi06Ай бұрын

  For DDR3 memory - you don't have to use that exact Micon part (they can be hard to find in stock and are often pricey), you can use any part from a competitor which has the same internal organization (256Mx16) and the same (or better) speed grade specification. For example, right now there are D2516ECMDXGJD-U parts from Kingston on Mouser which should work just fine instead of Micron part, but are like 3 times cheaper. Also your symbol for DDR3 device totally sucks - change it to group related signals close to each other. Take a look at any schematics of a real board for some ideas. Oh and don't even think about using wires for connecting this stuff - net labels ruleZ! Or your schematics will turn into spagetti mess before you know it.

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  @rehsdАй бұрын

  Thanks for the tip on the D2516ECMDXGJD-U parts. I will take a look. I agree that the existing symbol could be much better; I was using one of the system library symbols. The wires were temporary. :)

• 
  @asmi06Ай бұрын

  As for decoupling caps, I'm afraid you will have to go down to 0201 size if to have any hope of fitting them under BGA because 0402 caps have length of ~ 1 mm and so won't fit within via field for 0.8 mm ball pitch.

• 
  @rehsdАй бұрын

  I was thinking there might be some opportunity for diagonal mount or where there are consecutive pins of the same voltage (near a ground, of course). Maybe I'll add some 0201's just for the challenge. :)

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  @asmi06Ай бұрын

  @@rehsd Open UG865 and take a look at pinout diagram of that package (page 41) and you will see that power and ground pins in the middle section are routed to place caps right below them, and you can't really place them diagonally as same rail is typically there. 0201s are doable, but are a pain to solder as they as so tiny - so consider yourself warned :) Thankfully there isn't that many of them required.

• 
  @asmi06Ай бұрын

  @@rehsd That placement of decoupling caps you've shown is a joke. The whole idea for these caps to be as close as possible to power/ground balls, otherwise they will be kind of useless as they won't fulfil their main function.

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  @rehsdАй бұрын

  @@asmi06 Ya’, I mentioned that would need work. I’m not real worried about the PCB design until I get through the schematic. I’m placing things just to get a feel for the work ahead of me on the PCB.

• 
  @asmi06Ай бұрын

  VCCADC and GNDADC are used to power internal ADCs, which are also used for measuring die temperature, so you need to connect them properly even if you are not planning to use ADC (because DDR controller uses it internally for write levelling). You can take a look on schematics I've sent you how they are supposed to be connected (connection is the same for "pure" FPGA and for Zynq SoC) - GNDADC needs to be connected to the ground via ferrite bead, and VCCADC is to be connected to 1.8 V rail via "pi-filter". These traces need to be connected via thick traces away from noisy signals wherever possible.

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  @rehsdАй бұрын

  Thanks for that, @asm06! Noted... I cannot skip these.

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  @asmi06Ай бұрын

  With USB, you are allowed to draw 0.5 A from usb 2.0 port, or 0.8 A from usb 3.0 port. If you use USB-C port without PD, you can draw up to 1.5 A. Now, I have to warn you that a lot of PCs don't have any current protection whatsoever, so you can easily fry a port if you take too much current. Same can be said about cheap usb-c wall warts. So I highly recommend adding a polyfuse to your board to have overcurrent protection.

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  @rehsdАй бұрын

  A resettable fuse is on my list. Thanks, @asmi06!

• 
  @asmi06Ай бұрын

  2.54 mm contacts are typically rated for 2 Amps, and so are jumpers. I often use higher input voltage (typically 12 V when using a power brick, or 15 or 20 V when using Usb-c power) to reduce current and reduce losses.

• 
  @stephenwhite506Ай бұрын

  I believe that the voltages need to come up in a particular order. You can also take a look at the schematic for the EBAZ4205. It uses TLV62569 for power. It is a good example of using only a four layer board with a ZYNQ-70x0, however it only has 16bit DDR-RAM. You need six layers for 32bit (see Phil's video). The problem with the ZYNQ is that if you want to use USB then you have to supply a USB PHY and therefore it consumes many IO. It would be nice if you were only using 16bit DDR the upper 16bits for the 32bit data could be repurposed as additional IO but the pins can only be used for DDR.

• 
  @rehsdАй бұрын

  Thank you for all the info, Stephen! The EBAZ4205 schematic will be handy for reference. I will work on power sequencing as I move forward.

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  @ostrov11Ай бұрын

  спасибо, хорошая работа

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  @zxborg9681Ай бұрын

  Back when I was involved with a team building boards using Virtex, Zynq, and similar... we had a system architect, a couple dedicated schematic guy, three people on PCB/layout and an RF guy who had to bless trace length/impedances/stackup and so on. Built about two or three boards a year max. Not to mention the FPGA designers themselves doing the VHDL/Verilog, plus the half dozen offshore guys doing simulation and verification. Just so you get a sense of how cool it is to see one guy hacking this up in basement (or wherever it is).

• 
  @rehsdАй бұрын

  Basement, yes. 🙂 So... you're telling me this could be a multi-year project. 😊

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  @ghostlucian12Ай бұрын

  Have you tried to build an Risk-v processor to drive an LCD

• 
  @rehsdАй бұрын

  I have not.

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  @ChrisJackson-js8rdАй бұрын

  ive been working through the phils lab videos related to zynq too, what he covers he seems to cover well im playing around with an old spartan 3e atm, hoping to move onto something more modern soon not sure if ill skip straight to something like the zynq or build up one of the ice40's first edit: i also love TI for the documentation and support. theyre really helpful easy to deal with as a company i find.

• 
  @rjones8508Ай бұрын

  The pace of this series of videos is staggering! Btw, I was doing something with an old Spartan3 board and was thinking of making a custom board once everything is working. I'm sure that I checked pricing and availability on Digikey not long ago and was pleased to see it was in stock and inexpensive. But I just checked again and AMD just obsoleted these. No big surprise there but the price for available stock just skyrocketed to $150 or so each!

• 
  @rehsdАй бұрын

  $150... ouch... Time for a Zynq-7000! :)

• 
  @asmi06Ай бұрын

  Lol, trust me, you aren't gonna be "FINE" with power taking up a lot of space on a 8 or 10 layer PCB once you find out how much that space costs 😄

• 
  @rehsdАй бұрын

  😆 Ya', I know it gets expensive quickly. Here's how it's laying out so far: imgur.com/a/FwkhoTS.

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  @asmi06Ай бұрын

  @rehsd it's not the best idea to keep all regulators together as they all heat up which can lead (in extreme cases) to local overheating and even bending of pcb. It's best to spread them around, placing each one as close as possible to circuitry it powers for best transient response.

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  @rehsdАй бұрын

  @@asmi06 I'll experiment with that as I get more of the board components added. It seems like I see many PCBs with the regulators and inductors all along the same edge, but what you're saying makes sense. Thanks!

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  @asmi06Ай бұрын

  22uF 0603 capacitor is going to be pricey, so I recommend going for 0805 or even larger if higher voltage rating is required.

• 
  @asmi06Ай бұрын

  ​@rehsd I typically place converters to the side of FPGA which corresponds to IO bank that is to be powered by it, this naturally fits with power planelets on a power layer.

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  @asmi06Ай бұрын

  Get used to QFNs - as soon as you go beyond say 2 Amps, you will have to deal with parts that have exposed pad(s) for sinking heat into the pcb, otherwise heat will have nowhere to go but to overheat the part. That's the reason all medium and high current converters are in QFN-like packages.

• 
  @asmi06Ай бұрын

  You won't need 1.2V - that one is only required for devices with multi gigabit transceivers - like xc7z015.

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  @asmi06Ай бұрын

  Do one part per sheet, aim for Letter sheet size so that schematics can be easily exported into pdf and will remain readable.

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  @rehsdАй бұрын

  Thanks for the suggestion! I'm going to shoot for 11x17 (B) sheets (close to A3), which I find easy to print and still read on a decent monitor.

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  @asmi06Ай бұрын

  @@rehsd I've emailed you an example schematics just to give you some ideas of how such things are typically done. Hopefully it will prove useful.

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  @konturgestalterАй бұрын

  Love this series already!