Test run of my audio PLL SSTC. After making 2 DRSSTCs my university asked me to make a small table-top SSTC and this is the (unfinished) result. CD4046BE PLL chip driving TC4451/2 FET drivers driving half-bridge of IRFP460s.
F0 ~ 481kHz unloaded, 473kHz with arc
Secondary roughly 900 windings 0.2mm double enamel wire
Input capacitance: 680uF + 2x220nF capacitor dividers
Power draw: ~1kW in CW audio mode
Audio is transferred via Bluetooth and then directly coupled to the 4046 chip.
The inspiration for the driver came from www.vn-experimenty.eu/teslov....