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Design of Two Stage Operational Amplifier 45nm CMOS Process in Cadence Virtuoso step by step Process
In this video, I have shared the process of designing two stage #OPAMP/ #Operation_Amplifier/#Trans_Conductance #Amplifier design using #CADENCE EDA Tools (45 nm), and #DC_Simulation in Cadence Virtuoso, #Transient_Analysis in Cadence Virtuoso, #AC_Simulation in Cadence Virtuoso (AC gain and Phase), determine Unity Gain Frequency, Gain bandwidth (GBW) of OPAMP.
I also provide hand calculation with formula and hand calculation of each and every steps.
Please like , Share, Comments and #Subscribe my channel
#Thanks
Пікірлер: 42
I look forward to going through this video. Looks helpful.
@banikshuvo16
Жыл бұрын
Thanks for subscribe and share.
Please subscribe my channel.
The video is helpful, canyou please give me the link for the next video where you extrqct the pqrqmeter uCox of nmos please ?
thanks for an interesting video, can you give a schematic ? thanks you very much!
@banikshuvo16
2 ай бұрын
WC. You can see sch. Pause my video.
Thank you vai...it will be help us
@banikshuvo16
Жыл бұрын
Thanks
In this video, around the 8min mark, you mention uploading another video about how to do the simulation to find Betaeff that helped you get the unCox/upCox values. Is that video available?
@siddhantIITDh
Ай бұрын
in this video at exactly 0:05 seconds you see on the extreme left, where NMOS and PMOS are in diode connected configuration, exactly copy the same circuit (put VDD=1.8V, VSS to GND, give Current I as whatever biasing current is given in the video, take L of N and P mos as 1u, to avoid channel length mod, take W as say 10u), and run a DC simulation, select "save operating point" and nothing else. Run the simulation, then in the ADE window go to result -> Print -> DC operating point, and click on either of the NMOS and PMOS and new window will pop up, there you will find the required parameters such as beff, vth, region, ids, vgs, vth etc etc
Helpfull. Thank you vai. ( from student of uiu) ##Analogcircuit design. EEE435
@banikshuvo16
Жыл бұрын
Tnx. More appropriate if you share.
thank you...this video is very helpful Im doing a project in cadence ..can I get your help
@banikshuvo16
Жыл бұрын
share and subscribe please. Yes, I will do.
is this same with an ota?
@banikshuvo16
3 ай бұрын
Yes
@DeadSinceEver
2 ай бұрын
So you are saying ota and 2 stage opamp are just 2 names for same structure
Please make videos of LDO,DAC,ADC and Comparitors.
@banikshuvo16
Жыл бұрын
I will , Share with your friends, if it is helpful for you.
@responsiblestudent7938
Жыл бұрын
@@banikshuvo16 Thanks Dear Banik, I'm learning analog ic design on my own. KZread resource for such topics will be really helpful. Waiting for your upcoming videos. Good Luck
This video is very helpful. What are the values of Iref?
@banikshuvo16
Жыл бұрын
I calculated it.
@entertainmentspace1828
Жыл бұрын
@@banikshuvo16 How to calculate this? Please make a video om it. What is your M6 and M7 Width(W)? Because you are not showing the M6 and M7 Width(W) from your schematic.
@banikshuvo16
Жыл бұрын
@entertainmentspace1828 iref related to Slew Rate. And I also described for M6 and all other Mos.
Does anyone know what is the maximum W/L ratio of 90 nm ? And if it’s a one stage OPAMP what how do we decide Cc the output capacitor?
@banikshuvo16
Жыл бұрын
Wmax is 10um and u can use multiple finger if we want increse w. for single stage we do not need any CC. u can use cap as load.
how did you get the virtuoso cadence software
@banikshuvo16
10 ай бұрын
From my University
This video is very helpful. I am doing a project. Can you pls help?
@banikshuvo16
Жыл бұрын
What project?
@abolikatkar7982
Жыл бұрын
2 stage cmos op amp where 1st stage is current mirror loaded diff amp and 2nd stage is common source amp.
@abolikatkar7982
Жыл бұрын
Can you make such video?
@banikshuvo16
Жыл бұрын
@@abolikatkar7982 For your OTA, u can follow my video and the associated formulas.
@abolikatkar7982
Жыл бұрын
@@banikshuvo16 .Hi ! my question does not have the slew rate as given. How do I assume or calculate that?
What is your M6 and M7 Width(W)? Because you are not showing the M6 and M7 Width(W) from your schematic.
@banikshuvo16
Жыл бұрын
Calculated value
@simrankumari1760
Жыл бұрын
It's not increasing beyond 10um
Can i get the schematic file
@banikshuvo16
Жыл бұрын
Sorry
could you share these notes