Пікірлер

• 
  @pentachronic3 күн бұрын

  I’ve installed xschem and ngspice and I get errors when running ngspice after netlisting. The issue is that there is a “.save i(v1)” in my spice netlist that ngspice doesn’t like. Any ideas how to stop xschem spitting this out. My sch has no commands that would do this and I followed Stephans tutorial to the letter. Just curious if anyone here has experience this. I’ve spend over a day trying to figure this out. Rebuilt both tools and used different repos. Same result.

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  @pentachronic3 күн бұрын

  BTW if I hand edit the netlist spice file and remove the .save i(v1) it works fine. However I don’t want to be editing this file every time a netlist changes and I want to simulate. PITA

• 
  @ZeroToASICcourseКүн бұрын

  Do you have a current meter in the circuit? If so try removing it

• 
  @pentachronic18 сағат бұрын

  @@ZeroToASICcourse No. So as it turns out the VSource symbol by default has a “.save (@v)” attribute in it and this gets dumped into the netlist. The other Voltage Source symbols don’t have this. I’ve done a load of SPICE stuff in the past and wasn’t expecting a released symbol to have this in. I suspect Stephan was doing an experiment and it got accidentally checked in.

• 
  @pentachronic18 сағат бұрын

  It’s a “.save. ….something attribute”. Can’t recall off hand what exactly it is now since I’m not in front of the tools etc. Descend into the symbol and press “q” on the keyboard to see it. I put a “*” in front of it to comment it out.

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  @FrankenLab5 күн бұрын

  So glad I saw this video and glad that you're taking this on, HUGE thank you! This CPU was also very influential on my past also and the news of its discontinuation makes me really really sad. I just went on Mouser and bought a dozen of them, I can't believe how expensive they are. First two computers I had were TRS-80 model I, and ZX81.😥😥

• 
  @tolkienfan197215 күн бұрын

  I grew up with Z80 on a TRS-80. Learning Z80 set me up for my career. I'll always be fond of it.

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  @oxycada927220 күн бұрын

  If I enroll in your course a bit late, suppose later this year like November December, will I be getting same time as other for development or will I be asked to complete it sooner? Should I enroll in next batch? Basically when does your batch start and when is the best time to enroll in it? Actually I am from India, will I be getting the test boards?

• 
  @ZeroToASICcourse8 күн бұрын

  You can enroll whenever you want. The time it takes to get a board depends when you submit. Take a look here for the dates on previous shuttles: tinytapeout.com/runs/

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  @StuartChilds29 күн бұрын

  Bought Ed's book after watching this and am very glad I did - IMO a must-read for anybody, let alone those interested in technology and manufacturing. If only they'd taught us this kind of history in school ;) Thanks for the interview and great book

• 
  @georgegonzalez2476Ай бұрын

  So surprising that it's only like 1/20th the speed of a real 6502. Long ago I worked on a CDC 160A, which was all discrete germanium PNP transistors and wire runs up to 5 feet long.. It was the size of a door and had a 12 microsecond clock. Slightly faster, and in 1961! I'm also surprised you couldn't find some suitable active complementary pullups, that would have greatly helped the speed and lowered the power drain. For instance the BSS84AK,215 is only 18 cents each, is p-channel, and not too slow. It does have a whopping 18pf of gate capacitance, which is very low for a fet, but may be a problem if you need a lot of fanout.

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  @HennerZellerАй бұрын

  Very cool!

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  @roastflame9524Ай бұрын

  Awesome was looking for a solution for printing silicon

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  @martinheredia9000Ай бұрын

  Time to start learning analog design!

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  @qwaqwa1960Ай бұрын

  Could the DAC 'glitches' come from not accounting for switch resistance?

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  @ZeroToASICcourseАй бұрын

  I think just not perfectly matched resistors. Accurate resistors are hard, one reason why most semiconductor DACs are not based on resistors

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  @hugofrisk1889Ай бұрын

  Very cool! Don't really have the time to do a course but can you perhaps purchase the course material?

• 
  @jabu1482Ай бұрын

  Yes, I would like to do mixed signal design

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  @sergiogcolladoАй бұрын

  SUPER COOL!

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  @hbasm3271Ай бұрын

  Perhaps adding some internal memory would be a good way to make use of the extra space? I know that it would not truly be a Z80 replica anymore, but it could be fully compatible. I'm not so keen on the idea of multiple CPU models in one chip, if they can't all run at the same time, it feels like wasted space to me. The attraction for me personally is the idea of a powerful vintage chip that combines memory and other necessary features for a fully operating computer, as long as the assembly instruction set remains compatible and simple to learn and use to build anything you want.

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  @CoruscationsOfIneptitudeАй бұрын

  Thanks for the video!

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  @sfnembeddedАй бұрын

  Great! Now we can prove our prototype before submitting it to Tiny Tapeout. Good job!

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  @joseeduardobolisfortesАй бұрын

  When I saw the title, I thinked that Zilog had open the architecture of the chip, allowing anyone to fabricate one.

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  @raphaeljatobaАй бұрын

  Good video.

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  @theperfectionist1607Ай бұрын

  Why do you use Ubuntu?

• 
  @ZeroToASICcourseАй бұрын

  I like it!

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  @CoruscationsOfIneptitudeАй бұрын

  ​@@ZeroToASICcourse Do you have a complete list of all software that you personally use for ASIC design that is installed on your computer? I am buying a new system for programming and possibly ASIC design so want to do a clean install of all i need in one go, no faffing about going hither and thither. Hopefully sorted out within a month or two. Will be buying your suggested books too. Thanks for the videos!

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  @ZeroToASICcourseАй бұрын

  Let's see: Magic, ngspice, klayout, openlane, icarus verilog, gtkwave, cocotb, sby, gcc. TBH it's not so much the tools as the specific version of each tool. For the course I provide complete install instructions as well as a VM. For OS I recommend Ubuntu 22 LTS. 24 is not ready.

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  @theperfectionist1607Ай бұрын

  @@ZeroToASICcourse Even snaps?

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  @CoruscationsOfIneptitudeАй бұрын

  Excellent. Thank you very much. Lovely stuff all of this.

• 
  Ай бұрын

  Note to availability: In the "Eastern block" it was really hard to get any of the computers, but the cheaper ones, especially in the late 80s were available as imported from the West. Sinclair (ZX Spectrum and its variants), Atari (800XL, XE and 130XE) and some others like Commodore, Sharp or MSX weren't that common. Socialist block was able to produce some required components, but only a limited amounts and quality wasn't always that good. There were clones of 8080 (Tesla in CZ), U880D (Eastern Germany Z80 clone, which was not fully compatible), Russian DRAM chips (64Kx1), DRAM 16Kx1 were bit more common. In CZ we had locally produced computers based on 8080 and Z80. We had IQ150 / IQ151 (8080, 32KB RAM, modular with possibility to plug in number of extension modules for better graphics or even networking), PMD85 (Z80 based - I think) and its variants, PP-01 (I have no idea on architecture here) and then several ZX Spectrum clones (Didaktik Gamma, Ondra?). Problem was, they were produced in very small numbers, mostly for schools, so nobody had them at home. I had a ZX Spectrum+2 from the late eighties and I have it till today :-) It was fantastic machine and I absolutely love it.

• 
  @giannismentz3570Ай бұрын

  Open source Z80? What is this project? Like all the designs and specs to build Z80 if you build chips? Sounds amazing. Z80 could be made super small and tiny with modern manufacturing and it's quite a capable CPU. Not everything needs tons of computing power, you can do so many things with it. You don't even need to run a full fledged modern OS on it, just some kind of a small simple scheduler, maybe something like FreeRTOS+Z80 this would be awesome.

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  @jecelassumpcaojr890Ай бұрын

  The pads in the ChipIgnite are spread out quite a bit. If you pack them together with 10 per side you could have a much smaller area. With pads that are 80µm wide and 200µm deep, 10 per side plus the corners would be 10x80+2x200 = 1.2mm. This would give you a chip area of 1.2² = 1.44mm². The actual usable area inside the pads would be (10x80)² = 640000µm² or 0.64mm².

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  @emo666man122Ай бұрын

  you guys read my mind when it came to preservation :)

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  @tiaanbasson9092Ай бұрын

  Should make a 4 core Z80

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  @rej_aka_renaldas_ziomaАй бұрын

  Did you know that 256 core Z80 was made in 1980?! apps.dtic.mil/sti/tr/pdf/ADA081346.pdf

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  @gryzmanАй бұрын

  Z80 was meh, 6502 forever ;p

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  @rej_aka_renaldas_ziomaАй бұрын

  8-bit chip wars forever! Z80 was my first CPU and I loved it... In retrospect, I wish I had 6502 :) it would've been easier to write assembly for when you are 13 years old ;)

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  @Heater-v1.0.0Ай бұрын

  I saw a few Intel 4040 chips in a junk box whilst working at Marconi Research in Chelmsford in 1980. No idea if they ever used it for a real product. They had their own in house 16 bit processor for use in Radar Systems at the time. You did not mention the thousands of computers based on Z80 and running CP/M around that time.

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  @lower_case_tАй бұрын

  I recently stumbled over an IDE called KliveIde that allows you to write Z80 assembly and inject the compiled code directly into an emulated ZX Spectrum's memory. It was such a cool experience to have a comfortable programming environment for the Speccy, I immediately started writing some 3D stuff using vector graphics. If only I had access to something similar 40 years ago :)

• 
  @MikesTropicalTechАй бұрын

  I got a TRS-80 for Christmas when I was 14. Learned Z80 assembler to make copies of the protected "system" cassette tapes. Kicked off a 30 year career in software engineering. Soft spot in my heart for the venerable Z80!

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  @jon9103Ай бұрын

  Minor correction, PMOS and NMOS were invented at (roughly) the same time. The reason why CMOS came later was because it required figuring out how to create PMOS and NMOS transistors on the same die.

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  @ZeroToASICcourseАй бұрын

  thanks!

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  @MrMARS-yk1yvАй бұрын

  Sooooooo well explained❤

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  @ZeroToASICcourseАй бұрын

  Thanks a lot 😊

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  @scottfranco1962Ай бұрын

  This is interesting, but I don't see what the difference would be between this and an FPGA implementation.

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  @rej_aka_renaldas_ziomaАй бұрын

  1) FPGAs don’t handle 5V IO 2) “preservation” efforts to build silicon as close as possible to the original. FPGA in that regard is more like “software emulator of CPU” just faster, it has almost nothing to do with how actual chip worked.

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  @scottfranco1962Ай бұрын

  @@rej_aka_renaldas_zioma Disagree. What is on the FPGA is gates, not software. Your 5v I/O makes no sense, 5v I/O is still the standard pin on FPGA. An FPGA can be cycle accurate, and you can even specify it down to individual gates if you want. If, instead, your purpose is to get a cycle accurate Z80, that is not necessary. This would be insertable into any Z80 design, if not package wise. Then again, an FPGA Z80 could host an entire design including the Z80 on that same FPGA, so I would argue more useful in any case. PS you aren't going to be able to get a tinytapeout 40 pin original package, either.

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  @rej_aka_renaldas_ziomaАй бұрын

  @@scottfranco1962modern FPGAs (like iCE40) are 3.3V I/O tolerant not 5V. If you can point to small FPGA that has 5V IO, please do! It is not that much about being cycle accurate, that is a minimal requirement of course. Ideally I want to arrive to a similar signal delays (sub cycle) and internal chip layout. Why? Absolutely no practical reason except to preserve it for the future. I agree that it is impossible (or close to impossible) to fabricate DIP40 right now. The first attempt will be QFN64 with PCB adaptor to DIP40. Will see how it goes afterwards…

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  @scottfranco1962Ай бұрын

  @@rej_aka_renaldas_zioma "modern FPGAs (like iCE40) are 3.3V I/O tolerant not 5V." meaning completely compatible with 5v I/O. You really had to bend over backwards to split that hair. And again, with "signal delays" the original Z80 produced and consumed signals on the clock edge, so you would never see any internal delays on the pins. Further, yes you COULD emulate internal delays if you really wanted to. People can and have specified designs entirely in terms of gates for FPGAs. Verilog will accept gate descriptions. Why you would want to is beyond me. The point here is that you can produce a Z80, with completely compatible external signaling, with an FPGA, if not the exact same package, which was never the stated requirement. Further, its a more useful Z80, since it is an FPGA cell, meaning it could replace the rest of your design as well. Finally, and I hope this nails the coffin shut, the Z80 itself, was not cycle or gate identical as the Z80. How do I know? Because I am ex-Zilog. My boss was the guy who redesigned the Z80 in later products. He replaced the random logic Z80 of the early days with a microcoded Z80. All of the later Z80 products used that core.

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  @BartSliggersАй бұрын

  Crazy realization: If you would replace all transistors in a Z80 each with a new Z80, and then replace the resulting transistors again with Z80's, the number of transistors you end up with is equal to the transistors in a single Apple M1 processor. 8500 x 8500 x 8500 = 614,125,000,000,000

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  @rbarrisАй бұрын

  maybe a little off, I googled and see 16B transistors in an M1.

• 
  @ristekostadinov2820Ай бұрын

  consumer grade cpus aren't in the 100s of billions of transistors (as of now) we are in the 10s of billions

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  @cryptocsguy9282Ай бұрын

  Zero to ASIC should provide a certificate or udemy style qualification for anyone who has completed a computer chip design as part of their program 😀. That would look good on your CV/resume.

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  @ZeroToASICcourseАй бұрын

  we do!

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  @alexloktionoff6833Ай бұрын

  Having Z80 at ~50Mhz drop-in replacement in DIP40 could be nice, but for 10$ is pricey. Could you put Z80, 6502 and 8088 in one DIP40? That definitely could start to compete. If you could add even few hundreds of bytes optional cache that could become a bestseller for retro-diys!

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  @rej_aka_renaldas_ziomaАй бұрын

  Yeah, all classic 8-bit CPUs on a single chip is a great idea and I am toying around with it! Certainly not easy though. $10 - that’s a current price for Z80 on Mouser! I was quite shocked too!

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  @alexloktionoff6833Ай бұрын

  @@rej_aka_renaldas_zioma you can still buy used one for a $1. But 8088 even used costs about $10, so from my point of view to guarantee success there must be 8088 on the same die

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  @EdwinSteinerАй бұрын

  Awesome project!

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  @SimonJackson13Ай бұрын

  Drop IX and IY, use those codes for some threaded code jump opcodes, drop the bit test stuff, and just add those to the ED xx opcodes. Make a more useful IM 3 mode and put 64 kB on the die with a serial flash boot load hardware.

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  @ArneChristianRosenfeldtАй бұрын

  Yeah, would be cool if tiles of tiny tapeout could address other tiles. So we could have different CPUs (Z80,6502,RISCV,SH2,ARM2), different GPU (PPU VDP VIC ), and cache (code, data, sprites, wavetables (pcengine)) all spread over the tiles and then mix and match as we boot the chip. I still did not understand the bus here. Atari Jaguar has a single 64 bit bus to connect components on a single die. Quite obviously a lot of these components were originally individual PCBs.

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  @rej_aka_renaldas_ziomaАй бұрын

  @@ArneChristianRosenfeldtyeah, I was thinking similar, all 8-bit classic CPUs (6502/6800/8080/z80), VDPs (9918/HD6845/VIC/PPU/ULA) and Audio synths (SN/SA/AY/YM/APU) on a single chip! With configurable bus and 128K RAM.

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  @alexloktionoff6833Ай бұрын

  @@rej_aka_renaldas_zioma +8088 please :)

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  @rweaver6Ай бұрын

  I grew up in Italy. Standard pronunciation for Faggin would be long-soft g and accent on the second syllable. Sounds like: Fajín

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  @rej_aka_renaldas_ziomaАй бұрын

  Thank you for clarifying! I always wondered what is the correct way to spell Federico’s last name.

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  @gregebert5544Ай бұрын

  I looked at some of the projects that were on the previous tapeout, and most seem to be smallish learning-experience designs that could easily be done faster and cheaper on an FPGA because they were all-digital (and many FPGAs have real RAM cells instead of consuming logic+flip-flops), but that doesn't give you the full experience of what it takes to do a chip. So, what kinds of designs can you do with 130nm ? To start with, this is not bleeding-edge process technology. 20 years ago I was wrapping-up a 130nm mixed-signal design, and I think we could get a ring oscillator running up to 15Ghz. NMOS, PMOS, and diodes are easy. MOS capacitors were easy, diffusion resistors were a bit tricky to get the exact value you wanted, but what you did end up with was well-matched for nearby resistors with the same dimensions. Poly fuses were tricky because they didn't blow reliably. Spiral inductors were possible, but their inductance was very low. Our process had regular and thick gate-oxide, so we could get some transistors to 1.8V or 2.5V. We had 4 metal layers.

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  @ArneChristianRosenfeldtАй бұрын

  Mixed signal is possible on tiny tapeout. Even before someone made a PLL, whereas on an FPGA the system clock dominates everything. You could reproduce the clock circuit of 6502 or 80386. Maybe someone could tell me why RCA 1802 needs so many real physical cycles for one phantasy machine cycle. With so large features, I bet there could be DRAM like the registers in intel 8080 or VDP in NES.

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  @rej_aka_renaldas_ziomaАй бұрын

  Now TinyTapeout supports analog / mixed design!

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  @serhatkuk4180Ай бұрын

  Good job. Very cool stuff.

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  @serhatkuk4180Ай бұрын

  Very interesting interview. Thanks for sharing. I am glad people are using open source EDA tools. I wish Ellen and his family and father best luck.

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  @user-vx9ch6rs1wАй бұрын

  ... nintendo could run these on a pcie card and give people cloud gameboys and famiconm "emulation" at thousand a server

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  @cryptocsguy9282Ай бұрын

  @user-vx9ch6rs1w famicom used the 6502 & I believe the gameboy used a z80/8088 hybrid of sorts. Sega master system & game gear used a z80. What you mention is an interesting idea but I doubt that would happen

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  @user-vx9ch6rs1wАй бұрын

  @@cryptocsguy9282 god just make an accelerator card and let people kinda “bring your own rom” website where you just keep the rom in the server ram .

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  @vasenkasi4846Ай бұрын

  You can run that sort of emulator in browser using javascript. Any modern CPU could probably emulate 1000 NES computers simultaneously.

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  @user-vx9ch6rs1wАй бұрын

  @@vasenkasi4846 but it’s not pixel and instruction perfect. If emulators could do anything we would not need the amazing work of engineering this video showos

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  @md2perpeАй бұрын

  The first two computers I used had Z80: 1) Luxor ABC80, 2) Sinclair ZX Spectrum.

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  @rej_aka_renaldas_ziomaАй бұрын

  Mine was ZX Spectrum. I think Glug Glug was the first game.

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  @md2perpeАй бұрын

  @@rej_aka_renaldas_zioma Hadn't heard of that game until now. I wasn't much of a gamer; I was more interested in learning how computers work. But sometimes I played Atic Atac. However, the first game I remember was "Masken" (meaning "The Worm", a version of the Snake game) on the ABC80. Even my mom played it.

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  @chpsilvaАй бұрын

  My first was a ZX Spectrum clone and later I got another clone, an MSX 1.0 this time. Good times.

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  @varnoАй бұрын

  With a modern process node, you could probably use microbumps to improve the contact density, as the bonds are an array over the surface rather than arround the edge. By doing so, you could probably dice this down to 2x2mm. Still a heap of wasted space, but who knows you could put some memory on die, with an off-chip chip read/write enable.

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  @ArneChristianRosenfeldtАй бұрын

  tine tapeout uses an open source process. It is the only way to avoid NDAs and still go bare-bones. So we can talk about everything without contacting a lawyer. Kinda like Google WebM avoids patents. Lawyers complicate everything. Just check how obfuscated a lot of FPGAs are!

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  @ZeroToASICcourseАй бұрын

  unfortunately we currently only have access to sky130 process. There was a BGA package, but the padring was still around the edges.

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  @ArneChristianRosenfeldtАй бұрын

  @@ZeroToASICcourse with the small bond wires in two rows around the die a lot of pins have been realised in the past. The space below the die is ideal for capacitors.

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  @vitalyl1327Ай бұрын

  I met Federico Faggin a few years ago. Was absolutely thrilled to see the living legend. A bit disappointing that he did not really want to talk about Z80 or chips in general, he's now fully committed to some strange philosophy similar to the Leibniz's monadology, so I could not get any new exciting insights out of him. Still absolutely thrilling.

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  @cryptocsguy9282Ай бұрын

  @vitalyl1327 absolute legend , deserves to be more famous than Steve Jobs as far as I'm concerned 😊😮

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  @ArneChristianRosenfeldtАй бұрын

  He kinda peaked with Z80 , similar to other designers ( 6502 , 8086 ) . WDC did not design the original 6502. Still I would love to see some documentation about the CMOS version.

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  @ianmoore5502Ай бұрын

  This chip changed my life dramatically.

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  @joseoncrackАй бұрын

  a Z80 properly written should fit in an iCE40UP5K, it contains an extra 128KBytes of RAM on top of that. It only comes in a QFN-48 packages IIRC, but there are probably enough IOs to emulate all active pins of the Z80 apart from supply pins. It's currently about $10 per 1 on Mouser, but prices are overinflated these days - it used to be about half that price a few years ago. As an alternative, there are cheaper chinese FPGAs (Gowin and the like) that should do as well. If you don't mind chinese parts.

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  @rej_aka_renaldas_ziomaАй бұрын

  I love iCE40, but it has issue a very important shortcoming for retro replacements, it I/Os can not handle 5V! That means additional voltage regulators and buffers. Also it requires external flash chip for bitstream configuration. That’s a bunch of additional ICs that has to fit on a DIP40 sized PCB. The price of such contraption easily can exceed $20, if not $30.

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  @joseoncrackАй бұрын

  @@rej_aka_renaldas_zioma The additional components (regulator, flash) can be had for a total of about $1 or even less! And pretty small, the whole would fit on a DIP40 sized-PCB no problem - the "issue" is indeed with 5V I/Os. But that's an issue you'll have with 99.9% of current FPGAs. If you're ok with adding the level shifters though, I'm pretty sure it can still fit on a DIP40-sized PCB. Not to say that a pure silicon approach isn't better if you can do it for a reasonable price, but if I were to do this, I would still first prototype the whole thing on FPGA before going to silicon.

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  @stevetodd7383Ай бұрын

  I think you overestimate the number of LUTs needed, you should be able to fit a Z80 in 2K or fewer. Also low end FPGAs can be found that use built in flash memory so you don’t need an external config chip (something like the GOWIN GW1N series). You’ll need 5 of 8 bit level shifting line buffers, one of which needs to be bi-directional (the Z80 has 24 output pins, 6 inputs and a bi-directional data bus) and a voltage regulator to step down 5V to 3.3V. You should be able to put one together in low volumes for roughly £10.

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  @ArneChristianRosenfeldtАй бұрын

  @@joseoncrack Why do we need 5V ? If we already replace the heart of a retro computer, can't we use 3.3 V parts for the rest? I think a lot of people swap in SRAM. Keyboards and joysticks don't care for voltage. HDMI wants 3.3 . Any PLA, GLA could just be integrated onto any FPGA. A 5 V buffer for connectors to disk drive / tape also protects against ESD and EMI .

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  @rej_aka_renaldas_ziomaАй бұрын

  @@ArneChristianRosenfeldtwell, at that point it is easier to replace the whole system with FPGA :) iCE40 is perfectly able to run whole ZX Spectrum and generate HDMI out.

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  @TheoldmadАй бұрын

  Upvoted because "Z80" in the title ! I've learned so much with "Programming the Z80" by Rodnay Zaks ! I'm soooo happy to see that the community isn't dying at all.

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  @gregebert5544Ай бұрын

  I remember that book, but chose the one written by Barden, back in 1979. I've been hooked ever since. Hard to believe that today, the Z80 is almost 50 years old. To put that into perspective, when the Z80 came out, transistors had been around less than 30 years. Harder still is realizing how you could do anything with one of those CPUs; the most they could address directly was 64 Kbytes (No, not a typo....not 64GB, or 64MB) , and at 4Mhz it was the fastest CPU around.

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  @esra_erimezАй бұрын

  My dad has the Rodnay Zaks book in his basement

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  @TheoldmadАй бұрын

  @@esra_erimez Haha! This book is literally family jewelry.

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  @IAMDonkАй бұрын

  I have that very book right in front of me. One of the best books for understanding the z80. Third revised edition 1982.

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  @atomic14Ай бұрын

  That was my bible. Lost my copy at some point over the years :(

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  @quantumsmith371Ай бұрын

  The IO Pads don't necessarily have to be on the perimeter you can technically pack them in layers inside the chip.

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  @ZeroToASICcourseАй бұрын

  Bga z80

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  @alelondon23Ай бұрын

  great project. please consider having 2xZ-80 , the 2xSID variants( 6581 and 8580), 2x6510, AY-3-8912. please!!! maybe limiting i/o, or DMA/paged mem, but have a mode where all runs at the same time and the SIDs each its output and both running parallel. filll the rest with memory.

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  @ArneChristianRosenfeldtАй бұрын

  The Z80 needs 4 tiles. Isn’t each tile 300$ . All these other chips are the same size ( 6502 may fit in 3, SID more like 6 ).

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  @rej_aka_renaldas_ziomaАй бұрын

  @@ArneChristianRosenfeldt1 tile is $50. Note that making larger (1000 chip) batches the price goes significantly lower to $20 per chip.

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  @ArneChristianRosenfeldtАй бұрын

  @@rej_aka_renaldas_zioma Ah, cool. So below grocery shopping (with a backpack, no car) where I live, and affordable for groups / schools all over the world.

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  @alexloktionoff6833Ай бұрын

  More efficient is to add a cache than ram. Few hundreds bytes of cache can increase overall performance several times even with ordinary external ram.

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  @ArneChristianRosenfeldtАй бұрын

  @@alexloktionoff6833 I love cache strategy. Great project for a student. And then let’s put two caches on the die for Harvard architecture CPUs like MIPS.

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  @WaldoHazelegerАй бұрын

  Can the schematic be changed (and build) in simple logic gates/registers in stead of transistors ?

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  @ZeroToASICcourseАй бұрын

  Yes I'm sure it could be.

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  @WaldoHazelegerАй бұрын

  @@ZeroToASICcourse Do you have any example?