Hey its my alma mater, fundamentals of power electronics class. Good to see Professor Maksimovic on KZread! Thanks for posting these videos, its like being in class again.

Wow, someone just explained what I wanted to know. Now I just wish he explained the on and off cycles between Q1 and Q2.

Finally, now this was explained exactly how I wanted. Thank you.

Awesome. Very clear

great explanation 👏

Perfect. Thank you.

Awesome video. Thanks. He mentioned that "obviously both switches would not on at the same time". But why is that? And what would happen if they were on at the same time?

@akhurash

Жыл бұрын

If you had both turned ON at the same time, you would be shorting the input to ground.

Thank you

yeah same here , got exactly what i wanted

Awesome video very well explained. I keep having buck converters fail. All are the same converter with the same components. From early looks its the same MOSFET that fails over and over again. If I were to guess I would guess it's Q2 because the inductor discharges at a faster rate than it charges so I'm seeing higher currents through Q2. Is my thinking right?

@brendankopf6249

Жыл бұрын

Hi BradK. Your hypothesis may be correct, especially if you are using 2 different FETs with different Rds,on values. In addition, however, stray inductance due to FET package and layout in a discrete supply can cause negative voltage spikes on the gate of the low-side FET (Q2). This can violate the Vgs limit of Q2 if you are driving the gate really hard. If you find that this is the case, you can add a couple components to the gate of Q2 -- a low resistance series R for charging the gate and a Schottky diode for discharging the gate. Also, check for ringing on your switching node, as this can violate the Vds limit of Q2 if you did not consider it when selecting a FET for your low side. Hope this helps!

@BradKwfc

Жыл бұрын

@@brendankopf6249 Awesome info. Thanks for the suggestions I really appreciate it!

It's unfortunate that his microphone is in a blender