James Sharman started out with a hot air rework station but moved to a hotplate as it allows for finer heat control and the components don't go flying. Something to think about. And your LED function test was FANTASTIC!

@JaenEngineering

2 күн бұрын

He could go full Marco Reps and do whatever the hell it is he does in this video kzread.info/dash/bejne/dmZs17Wzc9adXc4.htmlsi=2APRJA3AfDym_uC4

@fabianschuiki

2 күн бұрын

Thanks 🙂! I'm definitely considering getting a hot plate for the soldering. Might do that sooner rather than later. And I had a lot of fun with the LED function test 😄

@fabianschuiki

2 күн бұрын

I love Marco Reps' channel. So many crazy builds and precision electronics 🤓. Absolutely fantastic.

@OscarSommerbo

Күн бұрын

I forgot, solder bridges on those resistor arrays, very common in James' videos.

@fabianschuiki

Күн бұрын

@OscarSommerbo Pretty sure my clumsy solder paste application didn't help with that either 🫣

Simply wonderful, a master class in production 👏

@fabianschuiki

Күн бұрын

Thank you very much 🙂!

The led test was great, loved it!

@fabianschuiki

Сағат бұрын

Haha thanks 😃 That was a lot of fun to do 😅

Thanks for the huge smile you made me have :D Very nice touch 😇

@tmbarral664

2 күн бұрын

It’ll be interesting to watch you when this tiny computer of yours will make some sounds ;)

@fabianschuiki

Күн бұрын

😃 Maybe it *does* need some sound output...

New post for sanity. @weirdboyjim did use shadow ram in his build, he started talking about it in part 91 and then implemented it in parts 96 & 97. Assuming worst case scenario it takes 4.5 ish seconds to copy 64kb at 70ns, which might be acceptable, then James approach is simple and a very reasonable path to take. I wouldn't describe his method as DMA, at least not in the conventional sense, he just uses 4 counter ICs to step through the address range and copying as the counter race through the addresses. Using a battery powered SRAM chip, I think, is a more elegant solution, but it adds complexity, no doubt about that. Either way, I think it is a good approach to reduce the access time for the much slower EEPROM.

@fabianschuiki

3 сағат бұрын

😃 That would be a very neat approach. I guess initially the 70ns ROM would also work directly as the decoder/program memory. And as soon as we get to some performance analysis and tweaking, an upgrade to an SRAM decoder would make sense.

Style points for Korobeyniki! 😀

@fabianschuiki

Күн бұрын

I couldn't resist 😃

Thanks

great work.

@fabianschuiki

3 сағат бұрын

Thanks! 🙂

Excellent 👌 Also, when you get round to the clock PCB, if you want to go with a pure logic build you can do it with just a pair of 2-input quad NAND gate ICs plus a few passives.

@OscarSommerbo

2 күн бұрын

I think that given he is aiming for a superscalar design, the clock needs to be stable and predicable. While a Pierce oscillator could work, Fabian have already built the classical clock generator, that Ben Eater and James Sharman uses.

@JaenEngineering

2 күн бұрын

​​​​@@OscarSommerbonot even that complicated. Do away with the crystal and output cap, and use the 74hc132 Schmitt input NAND and you have a very stable relaxation oscillator that also has a very handy enable input. You can then use another one of the gates to debounce a push button for stepping (again with a ready built in enable) and you still handily have a gate left over for combining the outputs. And those oscillators are every bit as stable as the 555 based circuits as they basically use the same idea.

@ArneChristianRosenfeldt

2 күн бұрын

@@JaenEngineeringevery home computer uses a Xtal. I don’t see why we need to do worse.

@fabianschuiki

2 күн бұрын

A relaxation oscillator like the 555 or a Schmitt trigger as you point out would definitely be nice to have on the clock PCB. 🤩 I was thinking about diving a little bit deeper into the whole frequency synthesis topic at that point and build up a PLL from discrete components on that PCB. I'd love to figure out what exactly the criticial path and its length is through the CPU, and then tune a clock to run the build as close to that upper limit as possible. It would be really cool if the CPU could write to a bunch of PLL registers to configure its own clock speed 🤓! That will still need a crystal reference oscillator. Could be a simple 1 MHz one though, since the PLL can synthesize a wide range of frequencies from that. But that's just the free-running part. I'd still want to have a potentiometer-tunable oscillator and the manual stepping button. A Schmitt trigger might even be simpler or cleaner than a 555-based approach, because it can generate a nice triangle waveform compared to the 555's rather lopsided sawtooth-y wave.

@OscarSommerbo

2 күн бұрын

@@fabianschuiki A tuneable PLL based clock sounds super cool!

funny idea for testing! I know i'd have hooked up an arduino mega, and make it do a cylon eye (galactica) or kitt effect! haha

@fabianschuiki

Күн бұрын

Haha, that would have been pretty neat as well 😃!

You can save some space there! Have you considered redesigning your register files so they slot on the edge, like a. NES cartridge? You can move the LEDs to the top edge so they are still visible, and use the L-shaped through hole jumper arrays so you can plug the register daughter boards into the back plane vertically.

@fabianschuiki

2 күн бұрын

That is a fantastic idea! 😀 I'm not entirely sure how bad things will get once we go dual-issue, but the number of chips for each register will roughly triple. That'll get a bit unwieldy in this flat build style, so making them vertical as you suggest would be a very nice solution. I do like the fact that you can see all ICs in this flat layout, but there's nothing too interesting about 16+ copies of the exact same set of register ICs... So maybe vertical it shall be? 😏

@phookadude

2 күн бұрын

@@fabianschuiki The RC2014 uses 90 degree bent pins, rather than a slot. Might be cheaper and easier than card slots.

@Eugensson

2 күн бұрын

@@phookadude yeah card slots are difficult to comply with. Gold edge treating, precise PCB thickness etc. L-pins are easier

@JaenEngineering

2 күн бұрын

I wonder if you can get 45° pins? Then you could kind of "shingle" them and get the benefit of both a lower footprint while still being able to somewhat see the boards and ICs 🤔

@fabianschuiki

Күн бұрын

My mind also immediately went to card edge connectors and card slots, but yeah, they can be pretty annoying. I like the idea of a 90° pin header though, or the shingles for extra awesomeness and style points 😎. For dual issue out-of-order execution, the registers will need 4 read ports and 4 write ports. That's 64 data lines... might be worth taking a regular two-row pin header and sandwich the PCB in between the rows, soldering have the connections on to one side, and the other half onto the other 🤔

What tool is used for the layout?

@fabianschuiki

14 сағат бұрын

It's EasyEDA 🙂

@pup4301

14 сағат бұрын

@@fabianschuiki Thank you but I was asking about the tool you used for planning where component systems would go when using easyeda.

@fabianschuiki

13 сағат бұрын

@pup4301 Ah sorry, I misunderstood. That's draw.io / diagrams.net. It's pretty convenient for architectural sketches and block diagrams 🙂

@pup4301

13 сағат бұрын

@@fabianschuiki Its okay I should have been more specific have a good day night or evening. It is 1am where I am. Late night work and all.

@fabianschuiki

13 сағат бұрын

@pup4301 Oh yeah, 1am is definitely late 😴!